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Reliability of electronic substrates after processing at lead-free soldering temperatures; Part 2.

Wickham, M; Hunt, C; Birch, B*; Furlong, J* (2010) Reliability of electronic substrates after processing at lead-free soldering temperatures; Part 2. NPL Report. MAT 38

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European legislation has resulted in all lead-free solders now being high tin alloys with significantly higher melting points compared to the previous conventional tin-lead alloy. Reinforced resin materials, may suffer degradation caused by the associated higher processing temperatures. This is compounded by the interconnecting structures being brought into closer proximity as a result of increasing technology advances driven by miniaturisation. The removal of non-functional pads to facilitate signal routing and improved drilling conditions for high aspect ratio vias, may also affect substrate reliability.

The National Physical Laboratory and PWB Interconnect Solutions Inc. have undertaken a joint study following identical test structures through both thermal cycling, with constant electrical monitoring (event detecting) and Interconnect Stress Testing (IST). The test vehicles included patterns to monitor changes in interconnection spacing (pitch) and also the effect of removing non-functional pads. The failure modes generated with both techniques were similar as were the relative rankings of the effects. The results showed that the removal of non-functional pads tended to improve reliability for high aspect ratio plated through holes in thicker substrates, although increasing interconnection pitch had little effect on failure rate. An evaluation of different surface finishes, showed that the ENIG finished PCBs performed significantly worse than expected, which was attributed to poor nickel quality. PCBs with HASL finish performed better than those with Ag finish, due to presence of solder down the vias. PCBs of greater thickness failed earlier than thinner PCBs due to their greater z-axis expansion during soldering. Polyimide substrates consistently out-performed high Tg phenolic cured epoxy PCBs, reflecting their higher Tg.

The results generated by both thermal cycling and IST showed extremely good correlation. Failures occurred at a slightly lower number of cycles for IST compared to thermal cycling due to the more stringent failure criteria possible with IST. The relative ranking of the level of failures is identical for both the thermal cycling and IST but the results were obtained in very different timescales. IST has been shown to give fast comparable results to thermal cycle testing with constant monitoring, but thermal cycling may be more beneficial if a wider range of experimental parameters are to be tested simultaneously.

Item Type: Report/Guide (NPL Report)
NPL Report No.: MAT 38
Keywords: solder, PCB relaibility, micro-via, lead-free
Subjects: Advanced Materials
Advanced Materials > Electronics Interconnection
Last Modified: 02 Feb 2018 13:14
URI: http://eprintspublications.npl.co.uk/id/eprint/4593

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