Zou, L; Hunt, C (1999) The effect of test voltage, test pattern and board finish on surface insulation resistance (SIR) measurements for various fluxes. NPL Report. CMMT(A)222

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Abstract

Existing SIR methods use a relatively coarse pitch test pattern and a high test voltage. This paper explores the SIR behaviour for five test field strengths, four test patterns and four board finishes with various fluxes. The field strengths include 10, 50, 100, 200 and 400 V/mm. The patterns vary from the existing IPC-B24 400 / 500 µm track and gap down to a 100 / 100 µm track and gap pattern. The work shows that both the test voltage and SIR test pattern are critical in influencing the SIR value. As the test voltage and pitch of the test pattern are reduced the SIR value drops. Hence using existing international standards test parameters the SIR value can be over estimated by 30 times. The work shows that fine pitch patterns and lower test voltages are more discriminating when determining reliability. A AuNi board finish and more frequent sampling have also been recommended.

Item Type:	Report/Guide (NPL Report)
NPL Report No.:	CMMT(A)222
Subjects:	Advanced Materials Advanced Materials > Electronics Interconnection
Last Modified:	02 Feb 2018 13:18
URI:	http://eprintspublications.npl.co.uk/id/eprint/1139

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